1. Field of the Invention
This invention relates generally to providing slot isolation of electronic circuitry in semiconductor wafers, and more specifically to a process for forming dislocation-free slots in silicon wafers by reactive ion etching techniques.
2. Discussion of Background and Prior Art
Semiconductor wafers are fabricated with a number of circuit components. It is necessary to provide electronic isolation from one component to another in certain instances. One method for accomplishing this is to provide depressions in the semiconductor wafers which form a positive separation between adjacent circuit elements. Such depressions or slots are normally filled with an appropriate filler material such as amorphous silicon.
Depressions or slots in a semiconductor wafer are conventionally formed by covering the surface of the wafer with a protective layer, generally an oxide layer, covering the oxide layer with a photoresist layer, exposing and developing the photoresist layer to provide a series of troughs in positions corresponding to desired depression or slot location, and then etching through the thus exposed portions of the oxide layer to expose the underlying wafer. Thereafter, anisotropic reactive ion etching techniques are used to cut slots into the wafer of a desired depth. The ions in the plasma are accelerated generally towards the surface of the wafer due to a bias voltage induced on an electrode upon which the wafers sit.
A number of problems exist with prior art plasma etching techniques. One problem which exists is that impurities are introduced into the semiconductor wafer below the bottom of such slots due to the use of relatively high bias voltages which impart high energy to the ions. Such impurities can deleteriously affect the performance of circuitry embedded in the wafers. Another problem which exists is that the bottoms of such slots tend to be very angular in that they tend to come to an apex or to a series of sharp apexes or cusps. When this occurs, later oxidation cycles can lead to the generation of dislocations in the wafer which in turn can lead to device failure. Any solution to the above problems must take into account the fact that it is important in the production of semiconductor wafers that production time is not overly long.